mirror of https://github.com/RT-Thread/rt-thread
bsp: k230: support canmv board
Some changes to support canmv board, such as: - Address constant, some may need be set as configuration later. - link script - build script Signed-off-by: Wang Chen <unicorn_wang@outlook.com>
This commit is contained in:
Wang Chen
Rbb666
parent
6229153364
commit
980a376e9b
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@ -24,14 +24,14 @@
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#include "page.h"
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/* respect to boot loader, must be 0xFFFFFFC000200000 */
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RT_STATIC_ASSERT(kmem_region, KERNEL_VADDR_START == 0xFFFFFFC000220000);
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RT_STATIC_ASSERT(kmem_region, KERNEL_VADDR_START == 0xffffffc000020000);
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rt_region_t init_page_region = {(rt_size_t)RT_HW_PAGE_START, (rt_size_t)RT_HW_PAGE_END};
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extern size_t MMUTable[];
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struct mem_desc platform_mem_desc[] = {
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{KERNEL_VADDR_START, (rt_size_t)RT_HW_PAGE_END - 1, (rt_size_t)ARCH_MAP_FAILED, NORMAL_MEM},
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{KERNEL_VADDR_START, (rt_size_t)0xFFFFFFC020000000 - 1, (rt_size_t)ARCH_MAP_FAILED, NORMAL_MEM},
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};
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#define NUM_MEM_DESC (sizeof(platform_mem_desc) / sizeof(platform_mem_desc[0]))
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@ -22,7 +22,7 @@ extern unsigned int __bss_start;
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extern unsigned int __bss_end;
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#define RT_HW_HEAP_BEGIN ((void *)&__bss_end)
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#define RT_HW_HEAP_END ((void *)(((rt_size_t)RT_HW_HEAP_BEGIN) + 8 * 1024 * 1024))
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#define RT_HW_HEAP_END ((void *)(((rt_size_t)RT_HW_HEAP_BEGIN) + 0x2000000 ))
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#define RT_HW_PAGE_START ((void *)((rt_size_t)RT_HW_HEAP_END + sizeof(rt_size_t)))
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#define RT_HW_PAGE_END ((void *)(RAM_END))
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@ -30,4 +30,174 @@ extern unsigned int __bss_end;
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void rt_hw_board_init(void);
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void rt_init_user_mem(struct rt_thread *thread, const char *name, unsigned long *entry);
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#define TIMER_CLK_FREQ (27000000)
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/* From K230 Technical Reference Manual, chapter 1.5 Address Space mapping */
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#define SRAM_BASE_ADDR (0x80200000UL)
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#define SRAM_IO_SIZE (0x00200000UL)
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#define KPU_BASE_ADDR (0x80400000UL)
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#define KPU_IO_SIZE (0x00000800UL)
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#define FFT_BASE_ADDR (0x80400800UL)
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#define FFT_IO_SIZE (0x00000400UL)
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#define AI2D_BASE_ADDR (0x80400C00UL)
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#define AI2D_IO_SIZE (0x00000400UL)
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#define GSDMA_BASE_ADDR (0x80800000UL)
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#define GSDMA_IO_SIZE (0x00004000UL)
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#define DMA_BASE_ADDR (0x80804000UL)
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#define DMA_IO_SIZE (0x00004000UL)
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#define DECOMP_BASE_ADDR (0x80808000UL)
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#define DECOMP_IO_SIZE (0x00004000UL)
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#define NON_AI2D_BASE_ADDR (0x8080C000UL)
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#define NON_AI2D_IO_SIZE (0x00004000UL)
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#define ISP_BASE_ADDR (0x90000000UL)
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#define ISP_IO_SIZE (0x00008000UL)
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#define DEWARP_BASE_ADDR (0x90008000UL)
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#define DEWARP_IO_SIZE (0x00001000UL)
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#define CSI_BASE_ADDR (0x90009000UL)
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#define CSI_IO_SIZE (0x00002000UL)
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#define VPU_BASE_ADDR (0x90400000UL)
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#define VPU_IO_SIZE (0x00010000UL)
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/*2.5D*/
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#define TAAH_GPU_BASE_ADDR (0x90800000UL)
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#define TAAH_GPU_IO_SIZE (0x00040000UL)
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#define VO_BASE_ADDR (0x90840000UL)
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#define VO_IO_SIZE (0x00010000UL)
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#define DSI_BASE_ADDR (0x90850000UL)
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#define DSI_IO_SIZE (0x00001000UL)
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#define GPU_ENGINE_BASE_ADDR (0x90A00000UL)
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#define GPU_ENGINE_IO_SIZE (0x00000800UL)
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#define PMU_BASE_ADDR (0x91000000UL)
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#define PMU_IO_SIZE (0x00000C00UL)
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#define RTC_BASE_ADDR (0x91000C00UL)
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#define RTC_IO_SIZE (0x00000400UL)
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#define CMU_BASE_ADDR (0x91100000UL)
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#define CMU_IO_SIZE (0x00001000UL)
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#define RMU_BASE_ADDR (0x91101000UL)
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#define RMU_IO_SIZE (0x00001000UL)
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#define BOOT_BASE_ADDR (0x91102000UL)
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#define BOOT_IO_SIZE (0x00001000UL)
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#define PWR_BASE_ADDR (0x91103000UL)
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#define PWR_IO_SIZE (0x00001000UL)
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#define MAILBOX_BASE_ADDR (0x91104000UL)
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#define MAILBOX_IO_SIZE (0x00001000UL)
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#define IOMUX_BASE_ADDR (0x91105000UL)
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#define IOMUX_IO_SIZE (0x00000800UL)
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#define HW_TIMER_BASE_ADDR (0x91105800UL)
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#define HW_TIMER_IO_SIZE (0x00000800UL)
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#define WDT0_BASE_ADDR (0x91106000UL)
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#define WDT0_IO_SIZE (0x00000800UL)
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#define WDT1_BASE_ADDR (0x91106800UL)
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#define WDT1_IO_SIZE (0x00000800UL)
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#define TS_BASE_ADDR (0x91107000UL)
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#define TS_IO_SIZE (0x00000800UL)
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#define HDI_BASE_ADDR (0x91107800UL)
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#define HDI_IO_SIZE (0x00000800UL)
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#define STC_BASE_ADDR (0x91108000UL)
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#define STC_IO_SIZE (0x00001000UL)
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#define BOOTROM_BASE_ADDR (0x91200000UL)
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#define BOOTROM_IO_SIZE (0x00010000UL)
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#define SECURITY_BASE_ADDR (0x91210000UL)
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#define SECURITY_IO_SIZE (0x00008000UL)
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#define UART0_BASE_ADDR (0x91400000UL)
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#define UART0_IO_SIZE (0x00001000UL)
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#define UART1_BASE_ADDR (0x91401000UL)
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#define UART1_IO_SIZE (0x00001000UL)
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#define UART2_BASE_ADDR (0x91402000UL)
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#define UART2_IO_SIZE (0x00001000UL)
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#define UART3_BASE_ADDR (0x91403000UL)
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#define UART3_IO_SIZE (0x00001000UL)
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#define UART4_BASE_ADDR (0x91404000UL)
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#define UART4_IO_SIZE (0x00001000UL)
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#define I2C0_BASE_ADDR (0x91405000UL)
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#define I2C0_IO_SIZE (0x00001000UL)
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#define I2C1_BASE_ADDR (0x91406000UL)
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#define I2C1_IO_SIZE (0x00001000UL)
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#define I2C2_BASE_ADDR (0x91407000UL)
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#define I2C2_IO_SIZE (0x00001000UL)
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#define I2C3_BASE_ADDR (0x91408000UL)
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#define I2C3_IO_SIZE (0x00001000UL)
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#define I2C4_BASE_ADDR (0x91409000UL)
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#define I2C4_IO_SIZE (0x00001000UL)
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#define PWM_BASE_ADDR (0x9140A000UL)
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#define PWM_IO_SIZE (0x00001000UL)
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#define GPIO0_BASE_ADDR (0x9140B000UL)
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#define GPIO0_IO_SIZE (0x00001000UL)
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#define GPIO1_BASE_ADDR (0x9140C000UL)
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#define GPIO1_IO_SIZE (0x00001000UL)
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#define ADC_BASE_ADDR (0x9140D000UL)
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#define ADC_IO_SIZE (0x00001000UL)
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#define CODEC_BASE_ADDR (0x9140E000UL)
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#define CODEC_IO_SIZE (0x00001000UL)
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#define AUDIO_BASE_ADDR (0x9140F000UL)
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#define AUDIO_IO_SIZE (0x00001000UL)
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#define USB2_BASE_ADDR (0x91500000UL)
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#define USB2_IO_SIZE (0x00080000UL)
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#define SD_HC_BASE_ADDR (0x91580000UL)
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#define SD_HC_IO_SIZE (0x00002000UL)
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#define SPI_QOPI_BASE_ADDR (0x91582000UL)
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#define SPI_QOPI_IO_SIZE (0x00002000UL)
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#define SPI_OPI_BASE_ADDR (0x91584000UL)
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#define SPI_OPI_IO_SIZE (0x00001000UL)
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#define HI_SYS_CONFIG_BASE_ADDR (0x91585000UL)
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#define HI_SYS_CONFIG_IO_SIZE (0x00000400UL)
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#define DDRC_CONF_BASE_ADDR (0x98000000UL)
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#define DDRC_CONF_IO_SIZE (0x02000000UL)
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#define SPI_XIP_FLASH_BASE_ADDR (0xC0000000UL)
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#define SPI_XIP_FLASH_IO_SIZE (0x08000000UL)
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#define IO_SPACE_BASE_ADDR (KPU_BASE_ADDR)
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#endif
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@ -22,7 +22,7 @@ OUTPUT_ARCH( "riscv" )
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MEMORY
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{
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SRAM(wx) : ORIGIN = 0xFFFFFFC000220000, LENGTH = 64M - 128K
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SRAM : ORIGIN = 0xffffffc000020000, LENGTH = 262012K
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}
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ENTRY(_start)
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@ -1 +1 @@
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__STACKSIZE__ = 8192;
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__STACKSIZE__ = 65536;
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@ -1,4 +1,5 @@
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import os
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import re
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# toolchains options
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ARCH ='risc-v'
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@ -13,14 +14,18 @@ if os.getenv('RTT_CC'):
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if CROSS_TOOL == 'gcc':
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PLATFORM = 'gcc'
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EXEC_PATH = r'/opt/Xuantie-900-gcc-elf-newlib-x86_64-V2.8.1/bin'
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EXEC_PATH = r'/opt/toolchain/riscv64-linux-musleabi_for_x86_64-pc-linux-gnu_rtt/bin'
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else:
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print('Please make sure your toolchains is GNU GCC!')
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exit(0)
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EXEC_PATH = os.getenv('RTT_EXEC_PATH', EXEC_PATH)
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if os.getenv('RTT_EXEC_PATH'):
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EXEC_PATH = os.getenv('RTT_EXEC_PATH')
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BUILD = 'debug'
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if re.match("-DDBGLV=0", os.getenv('KCFLAGS', '-DDBGLV=0')):
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BUILD = 'release'
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else:
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BUILD = 'debug'
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if PLATFORM == 'gcc':
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# toolchains
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@ -36,7 +41,7 @@ if PLATFORM == 'gcc':
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OBJDUMP = PREFIX + 'objdump'
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OBJCPY = PREFIX + 'objcopy'
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DEVICE = ' -mcmodel=medany -march=rv64imafdc -mabi=lp64'
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DEVICE = ' -mcmodel=medany -march=rv64imafdcv -mabi=lp64d'
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CFLAGS = DEVICE + ' -Wno-cpp -fvar-tracking -ffreestanding -fno-common -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -D_POSIX_SOURCE '
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AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -D__ASSEMBLY__'
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LFLAGS = DEVICE + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,_start -T link.lds' + ' -lsupc++ -lgcc -static'
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@ -44,10 +49,11 @@ if PLATFORM == 'gcc':
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LPATH = ''
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if BUILD == 'debug':
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CFLAGS += ' -O2 -g -gdwarf-2'
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AFLAGS += ' -g -gdwarf-2'
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CFLAGS += ' -O0 -gdwarf-2'
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AFLAGS += ' -gdwarf-2'
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else:
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CFLAGS += ' -O2 -g -gdwarf-2'
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CFLAGS += ' ' + os.getenv('KCFLAGS', '-DDBGLV=0')
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CXXFLAGS = CFLAGS
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