Important: Change `--assert` to be the default; use `--no-assert` for legacy behavior and faster runtimes.

Changes

@@ -11,6 +11,10 @@ contributors that suggested or implemented a given issue are shown in []. Thanks
 Verilator 5.037 devel
 ==========================
 
+**Important:**
+
+* Change `--assert` to be the default; use `--no-assert` for legacy behavior and faster runtimes.
+
 **Other:**
 
 * Support redeclaring type as non-type; major parsing change (#2412) (#6020) (#6042) (#6044).

bin/verilator

@@ -311,8 +311,8 @@ detailed descriptions of these arguments.
      +1800-2012ext+<ext>        Use SystemVerilog 2012 with file extension <ext>
      +1800-2017ext+<ext>        Use SystemVerilog 2017 with file extension <ext>
      +1800-2023ext+<ext>        Use SystemVerilog 2023 with file extension <ext>
-    --assert                    Enable all assertions
+    --no-assert                 Disable all assertions
-    --assert-case               Enable unique/unique0/priority case related checks
+    --no-assert-case            Disable unique/unique0/priority-case assertions
     --autoflush                 Flush streams after all $displays
     --bbox-sys                  Blackbox unknown $system calls
     --bbox-unsup                Blackbox unsupported language features

docs/guide/exe_verilator.rst

@@ -86,13 +86,19 @@ Summary:
       grammar and other semantic extensions which might not be legal when
       set to an older standard.
 
-.. option:: --assert
+.. option:: --no-assert
 
-   Enable all assertions. Implies :vlopt:`--assert-case`.
+   Disable all assertions. Implies :vlopt:`--no-assert-case`.
 
-.. option:: --assert-case
+   In versions before 5.038, these were disabled by default, and `--assert`
+   was required to enable assertions.
 
-   Enable unique/unique0/priority case related checks.
+.. option:: --no-assert-case
+
+   Disable unique/unique0/priority case related checks.
+
+   In versions before 5.038, these were disabled by default, and `--assert`
+   or `--assert-case` was required to enable case assertions.
 
 .. option:: --autoflush
 

docs/guide/faq.rst

@@ -335,7 +335,7 @@ How do I prevent my assertions from firing during reset?
 
 Call :code:`Verilated::assertOn(false)` before you first call the model,
 then turn it back on after reset.  It defaults to true.  When false, all
-assertions controlled by :vlopt:`--assert` are disabled.
+assertions are disabled.
 
 
 Why do I get "undefined reference to sc_time_stamp()?

docs/guide/languages.rst

@@ -90,14 +90,14 @@ wreal.
 Synthesis Directive Assertion Support
 -------------------------------------
 
-With the :vlopt:`--assert` option, Verilator reads any
+Verilator reads any :code:`//synopsys full_case` or :code:`//synopsys
+parallel_case` directives.  The same applies to any :code:`//ambit
+synthesis`, :code:`//cadence` or :code:`//pragma` directives of the same
+form.
 
-:code:`//synopsys full_case` or :code:`//synopsys parallel_case`
+When these synthesis directives are discovered, unless
-directives.  The same applies to any :code:`//ambit synthesis`,
+:vlopt:`--no-assert-case` option is used, Verilator will either formally
-:code:`//cadence` or :code:`//pragma` directives of the same form.
+prove the directive to be true, or, failing that, will insert the
-
-When these synthesis directives are discovered, Verilator will either
-formally prove the directive to be true, or, failing that, will insert the
 appropriate code to detect failing cases at simulation runtime and print an
 "Assertion failed" error message.
 

docs/guide/simulating.rst

@@ -76,12 +76,14 @@ Benchmarking & Optimization
 For best performance, run Verilator with the :vlopt:`-O3`
 :vlopt:`--x-assign fast <--x-assign>`
 :vlopt:`--x-initial fast <--x-initial>`
-:vlopt:`--noassert <--assert>` options.  The :vlopt:`-O3`
+:vlopt:`--no-assert` options.  The :vlopt:`-O3`
 option will require a longer time to run Verilator, and
 :vlopt:`--x-assign fast <--x-assign>`
 :vlopt:`--x-initial fast <--x-assign>`
-may increase the risk of reset bugs in trade for performance; see the above
+may increase the risk of reset bugs in trade for performance.  The
-documentation for these options.
+:vlopt:`--no-assert` will suppress checking assertions, which is faster and
+appropriate for known-good models running software, but may hide design
+errors.  See the above documentation for these options.
 
 If using Verilated multithreaded, consider overriding Verilator's default
 thread-to-processor assignment by using ``numactl``; see
@@ -203,9 +205,6 @@ With :vlopt:`--coverage` or :vlopt:`--coverage-user`, Verilator will
 translate functional coverage points the user has inserted manually in
 SystemVerilog code through into the Verilated model.
 
-Currently, all functional coverage points are specified using SystemVerilog
-assertion syntax, which must be separately enabled with :vlopt:`--assert`.
-
 For example, the following SystemVerilog statement will add a coverage
 point under the coverage name "DefaultClock":
 

docs/guide/warnings.rst

@@ -333,8 +333,8 @@ List Of Warnings
    Unique case statements that select on an enumerated variable, where all
    of the enumerated values are covered by case items, are considered
    complete even if the case statement does not cover illegal
-   non-enumerated values (IEEE 1800-2023 12.5.3).  To check that illegal
+   non-enumerated values (IEEE 1800-2023 12.5.3).  Verilator checks that
-   values are not hit, use :vlopt:`--assert`.
+   illegal values are not hit, unless :vlopt:`--no-assert-case` was used.
 
    Ignoring this warning will only suppress the lint check; it will
    simulate correctly.

src/V3Assert.cpp

@@ -57,7 +57,7 @@ class AssertVisitor final : public VNVisitor {
         switch (directiveType) {
         case VAssertDirectiveType::INTRINSIC: return new AstConst{fl, AstConst::BitTrue{}};
         case VAssertDirectiveType::VIOLATION_CASE: {
-            if (v3Global.opt.assertCaseOn()) {
+            if (v3Global.opt.assertCase()) {
                 return new AstCExpr{fl, "vlSymsp->_vm_contextp__->assertOn()", 1};
             }
             // If assertions are off, have constant propagation rip them out later

src/V3Options.cpp

@@ -1180,7 +1180,10 @@ void V3Options::parseOptsList(FileLine* fl, const string& optdir, int argc,
                 [this](const char* optp) { addLangExt(optp, V3LangCode::L1800_2023); });
 
     // Minus options
-    DECL_OPTION("-assert", OnOff, &m_assert);
+    DECL_OPTION("-assert", CbOnOff, [this](bool flag) {
+        m_assert = flag;
+        m_assertCase = flag;
+    });
     DECL_OPTION("-assert-case", OnOff, &m_assertCase);
     DECL_OPTION("-autoflush", OnOff, &m_autoflush);
 

src/V3Options.h

@@ -251,8 +251,8 @@ private:
     bool m_preprocResolve = false;  // main switch: --preproc-resolve
     bool m_makePhony = false;       // main switch: -MP
     bool m_preprocNoLine = false;   // main switch: -P
-    bool m_assert = false;          // main switch: --assert
+    bool m_assert = true;           // main switch: --assert
-    bool m_assertCase = false;      // main switch: --assert-case
+    bool m_assertCase = true;       // main switch: --assert-case
     bool m_autoflush = false;       // main switch: --autoflush
     bool m_bboxSys = false;         // main switch: --bbox-sys
     bool m_bboxUnsup = false;       // main switch: --bbox-unsup
@@ -520,7 +520,7 @@ public:
     bool stdWaiver() const { return m_stdWaiver; }
     bool structsPacked() const { return m_structsPacked; }
     bool assertOn() const { return m_assert; }  // assertOn as __FILE__ may be defined
-    bool assertCaseOn() const { return m_assertCase || m_assert; }
+    bool assertCase() const { return m_assertCase; }
     bool autoflush() const { return m_autoflush; }
     bool bboxSys() const { return m_bboxSys; }
     bool bboxUnsup() const { return m_bboxUnsup; }

test_regress/t/t_assert_disabled.py

@@ -12,7 +12,7 @@ import vltest_bootstrap
 test.scenarios('simulator')
 test.top_filename = "t/t_assert_on.v"
 
-test.compile()
+test.compile(verilator_flags2=['--no-assert'])
 
 test.execute()
 

test_regress/t/t_assert_procedural_clk_bad.py

@@ -11,6 +11,6 @@ import vltest_bootstrap
 
 test.scenarios('vlt')
 
-test.lint(expect_filename=test.golden_filename, verilator_flags2=['--assert'], fails=True)
+test.lint(expect_filename=test.golden_filename, fails=True)
 
 test.passes()

test_regress/t/t_assert_synth_off.py

@@ -13,7 +13,8 @@ test.scenarios('simulator')
 test.top_filename = "t/t_assert_synth.v"
 
 test.compile(v_flags2=[
-    '+define+FAILING_FULL', '+define+FAILING_PARALLEL', '+define+FAILING_OH', '+define+FAILING_OC'
+    '--no-assert-case', '+define+FAILING_FULL', '+define+FAILING_PARALLEL', '+define+FAILING_OH',
+    '+define+FAILING_OC'
 ])
 
 test.execute()

test_regress/t/t_debug_emitv.out

@@ -223,7 +223,7 @@ module Vt_debug_emitv_t;
                 $stop;
             end
             case (in)
-                'sh1: begin $display("1");
+                 // synopsys full_case parallel_case'sh1: begin $display("1");
                 end
                 default: begin $display("default");
                 end