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157 Commits

Author SHA1 Message Date
Bruno Cardoso Lopes 60aa85b672 Tidy up a bit more, fix tab and remove trailing whitespaces 
llvm-svn: 140186
 2011-09-20 21:45:26 +00:00
Bruno Cardoso Lopes 05f3f4939a Tidy up code! 
llvm-svn: 140183
 2011-09-20 21:39:06 +00:00
Bruno Cardoso Lopes d126347f32 Re-write part of VEX encoding logic, to be more easy to read! Also fix 
a bug and add a testcase!

llvm-svn: 138123
 2011-08-19 22:27:29 +00:00
Bruno Cardoso Lopes 22241acc29 Fix PR10677. Initial patch and idea by Peter Cooper but I've changed the 
implementation!

llvm-svn: 138029
 2011-08-19 02:23:56 +00:00
Evan Cheng eda1d4f3ba Emit an error is asm parser parsed X86_64 only registers, e.g. %rax, %sil. 
This can happen in cases where TableGen generated asm matcher cannot check
whether a register operand is in the right register class. e.g. mem operands.

rdar://8204588

llvm-svn: 136292
 2011-07-27 23:22:03 +00:00
Jeffrey Yasskin 6381c0100b Explicitly cast narrowing conversions inside {}s that will become errors in 
C++0x.

llvm-svn: 136211
 2011-07-27 06:22:51 +00:00
Evan Cheng b25310095f More refactoring. 
llvm-svn: 135939
 2011-07-25 19:33:48 +00:00